yosys (0.52-2)

2 versions available in ubuntu/resolute/universe/arm64

Details

Core information at a glance

Distribution
ubuntu
Origin
ubuntu-resolute-ports
Repository
https://ports.ubuntu.com
Codename
resolute
Component
universe
Source
yosys
Architecture
arm64
Section
universe/electronics
Priority
optional
Maintainer
Ubuntu Developers <[email protected]>

Size & integrity

Byte sizes and integrity verification

Installed size
24.9 MB
Size expected
6.2 MB
Size actual
6.2 MB
Size match
match

Dependencies

Required package dependencies

Recommends

Recommended package dependencies

Suggested packages

Recommended additional packages

  • None

Provides

Virtual packages provided

  • None

Description

Framework for Verilog RTL synthesis

Tags

Package classification tags

None

Checksums

Hash values and integrity verification status

TypeActualMatch
MD5ea3bbaf5…c2f7f085match
SHA-1f2bf8d3f…a1dc4c72match
SHA-2568aebe67e…5acd5955match
SHA-5126cc498c7…8cda8104match

Contents

Files and directories included

.
usr
usr/bin
usr/bin/yosys
usr/bin/yosys-filterlib
usr/bin/yosys-smtbmc
usr/bin/yosys-witness
usr/share
usr/share/doc
usr/share/doc/yosys
usr/share/doc/yosys/README.md.gz
usr/share/doc/yosys/copyright
usr/share/man
usr/share/man/man1
usr/share/man/man1/yosys-filterlib.1.gz
usr/share/man/man1/yosys-smtbmc.1.gz
usr/share/man/man1/yosys-witness.1.gz
usr/share/man/man1/yosys.1.gz
usr/share/python3
usr/share/python3/runtime.d
usr/share/python3/runtime.d/yosys.rtupdate
usr/share/yosys
usr/share/yosys/abc9_map.v
usr/share/yosys/abc9_model.v
usr/share/yosys/abc9_unmap.v
usr/share/yosys/achronix
usr/share/yosys/achronix/speedster22i
usr/share/yosys/achronix/speedster22i/cells_map.v
usr/share/yosys/achronix/speedster22i/cells_sim.v
usr/share/yosys/adff2dff.v
usr/share/yosys/anlogic
usr/share/yosys/anlogic/arith_map.v
usr/share/yosys/anlogic/brams.txt
usr/share/yosys/anlogic/brams_map.v
usr/share/yosys/anlogic/cells_map.v
usr/share/yosys/anlogic/cells_sim.v
usr/share/yosys/anlogic/eagle_bb.v
usr/share/yosys/anlogic/lutrams.txt
usr/share/yosys/anlogic/lutrams_map.v
usr/share/yosys/cells.lib
usr/share/yosys/choices
usr/share/yosys/choices/han-carlson.v
usr/share/yosys/choices/kogge-stone.v
usr/share/yosys/choices/sklansky.v
usr/share/yosys/cmp2lcu.v
usr/share/yosys/cmp2lut.v
usr/share/yosys/cmp2softlogic.v
usr/share/yosys/coolrunner2
usr/share/yosys/coolrunner2/cells_counter_map.v
usr/share/yosys/coolrunner2/cells_latch.v
usr/share/yosys/coolrunner2/cells_sim.v
usr/share/yosys/coolrunner2/tff_extract.v
usr/share/yosys/coolrunner2/xc2_dff.lib
usr/share/yosys/dff2ff.v
usr/share/yosys/ecp5
usr/share/yosys/ecp5/arith_map.v
usr/share/yosys/ecp5/brams.txt
usr/share/yosys/ecp5/brams_map.v
usr/share/yosys/ecp5/cells_bb.v
usr/share/yosys/ecp5/cells_ff.vh
usr/share/yosys/ecp5/cells_io.vh
usr/share/yosys/ecp5/cells_map.v
usr/share/yosys/ecp5/cells_sim.v
usr/share/yosys/ecp5/dsp_map.v
usr/share/yosys/ecp5/latches_map.v
usr/share/yosys/ecp5/lutrams.txt
usr/share/yosys/ecp5/lutrams_map.v
usr/share/yosys/efinix
usr/share/yosys/efinix/arith_map.v
usr/share/yosys/efinix/brams.txt
usr/share/yosys/efinix/brams_map.v
usr/share/yosys/efinix/cells_map.v
usr/share/yosys/efinix/cells_sim.v
usr/share/yosys/efinix/gbuf_map.v
usr/share/yosys/fabulous
usr/share/yosys/fabulous/arith_map.v
usr/share/yosys/fabulous/cells_map.v
usr/share/yosys/fabulous/ff_map.v
usr/share/yosys/fabulous/io_map.v
usr/share/yosys/fabulous/latches_map.v
usr/share/yosys/fabulous/prims.v
usr/share/yosys/fabulous/ram_regfile.txt
usr/share/yosys/fabulous/regfile_map.v
usr/share/yosys/gate2lut.v
usr/share/yosys/gatemate
usr/share/yosys/gatemate/arith_map.v
usr/share/yosys/gatemate/brams.txt
usr/share/yosys/gatemate/brams_init_20.vh
usr/share/yosys/gatemate/brams_init_40.vh
usr/share/yosys/gatemate/brams_map.v
usr/share/yosys/gatemate/cells_bb.v
usr/share/yosys/gatemate/cells_sim.v
usr/share/yosys/gatemate/inv_map.v
usr/share/yosys/gatemate/lut_map.v
usr/share/yosys/gatemate/lut_tree_cells.genlib
usr/share/yosys/gatemate/lut_tree_map.v
usr/share/yosys/gatemate/mul_map.v
usr/share/yosys/gatemate/mux_map.v
usr/share/yosys/gatemate/reg_map.v
usr/share/yosys/gowin
usr/share/yosys/gowin/arith_map.v
usr/share/yosys/gowin/brams.txt
usr/share/yosys/gowin/brams_map.v
usr/share/yosys/gowin/cells_map.v
usr/share/yosys/gowin/cells_sim.v
usr/share/yosys/gowin/cells_xtra_gw1n.v
usr/share/yosys/gowin/cells_xtra_gw2a.v
usr/share/yosys/gowin/cells_xtra_gw5a.v
usr/share/yosys/gowin/lutrams.txt
usr/share/yosys/gowin/lutrams_map.v
usr/share/yosys/greenpak4
usr/share/yosys/greenpak4/cells_blackbox.v
usr/share/yosys/greenpak4/cells_latch.v
usr/share/yosys/greenpak4/cells_map.v
usr/share/yosys/greenpak4/cells_sim.v
usr/share/yosys/greenpak4/cells_sim_ams.v
usr/share/yosys/greenpak4/cells_sim_digital.v
usr/share/yosys/greenpak4/cells_sim_wip.v
usr/share/yosys/greenpak4/gp_dff.lib
usr/share/yosys/ice40
usr/share/yosys/ice40/abc9_model.v
usr/share/yosys/ice40/arith_map.v
usr/share/yosys/ice40/brams.txt
usr/share/yosys/ice40/brams_map.v
usr/share/yosys/ice40/cells_map.v
usr/share/yosys/ice40/cells_sim.v
usr/share/yosys/ice40/dsp_map.v
usr/share/yosys/ice40/ff_map.v
usr/share/yosys/ice40/latches_map.v
usr/share/yosys/ice40/spram.txt
usr/share/yosys/ice40/spram_map.v
usr/share/yosys/intel
usr/share/yosys/intel/common
usr/share/yosys/intel/common/altpll_bb.v
usr/share/yosys/intel/common/brams_m9k.txt
usr/share/yosys/intel/common/brams_map_m9k.v
usr/share/yosys/intel/common/ff_map.v
usr/share/yosys/intel/common/m9k_bb.v
usr/share/yosys/intel/cyclone10lp
usr/share/yosys/intel/cyclone10lp/cells_map.v
usr/share/yosys/intel/cyclone10lp/cells_sim.v
usr/share/yosys/intel/cycloneiv
usr/share/yosys/intel/cycloneiv/cells_map.v
usr/share/yosys/intel/cycloneiv/cells_sim.v
usr/share/yosys/intel/cycloneive
usr/share/yosys/intel/cycloneive/cells_map.v
usr/share/yosys/intel/cycloneive/cells_sim.v
usr/share/yosys/intel/max10
usr/share/yosys/intel/max10/cells_map.v
usr/share/yosys/intel/max10/cells_sim.v
usr/share/yosys/intel_alm
usr/share/yosys/intel_alm/common
usr/share/yosys/intel_alm/common/abc9_map.v
usr/share/yosys/intel_alm/common/abc9_model.v
usr/share/yosys/intel_alm/common/abc9_unmap.v
usr/share/yosys/intel_alm/common/alm_map.v
usr/share/yosys/intel_alm/common/alm_sim.v
usr/share/yosys/intel_alm/common/arith_alm_map.v
usr/share/yosys/intel_alm/common/bram_m10k.txt
usr/share/yosys/intel_alm/common/bram_m10k_map.v
usr/share/yosys/intel_alm/common/dff_map.v
usr/share/yosys/intel_alm/common/dff_sim.v
usr/share/yosys/intel_alm/common/dsp_map.v
usr/share/yosys/intel_alm/common/dsp_sim.v
usr/share/yosys/intel_alm/common/lutram_mlab.txt
usr/share/yosys/intel_alm/common/megafunction_bb.v
usr/share/yosys/intel_alm/common/mem_sim.v
usr/share/yosys/intel_alm/common/misc_sim.v
usr/share/yosys/intel_alm/cyclonev
usr/share/yosys/intel_alm/cyclonev/cells_sim.v
usr/share/yosys/lattice
usr/share/yosys/lattice/arith_map_ccu2c.v
usr/share/yosys/lattice/arith_map_ccu2d.v
usr/share/yosys/lattice/brams_16kd.txt
usr/share/yosys/lattice/brams_8kc.txt
usr/share/yosys/lattice/brams_map_16kd.v
usr/share/yosys/lattice/brams_map_8kc.v
usr/share/yosys/lattice/ccu2c_sim.vh
usr/share/yosys/lattice/ccu2d_sim.vh
usr/share/yosys/lattice/cells_bb_ecp5.v
usr/share/yosys/lattice/cells_bb_xo2.v
usr/share/yosys/lattice/cells_bb_xo3.v
usr/share/yosys/lattice/cells_bb_xo3d.v
usr/share/yosys/lattice/cells_ff.vh
usr/share/yosys/lattice/cells_io.vh
usr/share/yosys/lattice/cells_map.v
usr/share/yosys/lattice/cells_sim_ecp5.v
usr/share/yosys/lattice/cells_sim_xo2.v
usr/share/yosys/lattice/cells_sim_xo3.v
usr/share/yosys/lattice/cells_sim_xo3d.v
usr/share/yosys/lattice/common_sim.vh
usr/share/yosys/lattice/dsp_map_18x18.v
usr/share/yosys/lattice/latches_map.v
usr/share/yosys/lattice/lutrams.txt
usr/share/yosys/lattice/lutrams_map.v
usr/share/yosys/microchip
usr/share/yosys/microchip/LSRAM.txt
usr/share/yosys/microchip/LSRAM_map.v
usr/share/yosys/microchip/arith_map.v
usr/share/yosys/microchip/brams_defs.vh
usr/share/yosys/microchip/cells_map.v
usr/share/yosys/microchip/cells_sim.v
usr/share/yosys/microchip/polarfire_dsp_map.v
usr/share/yosys/microchip/uSRAM.txt
usr/share/yosys/microchip/uSRAM_map.v
usr/share/yosys/mul2dsp.v
usr/share/yosys/nanoxplore
usr/share/yosys/nanoxplore/arith_map.v
usr/share/yosys/nanoxplore/brams.txt
usr/share/yosys/nanoxplore/brams_init.vh
usr/share/yosys/nanoxplore/brams_map.v
usr/share/yosys/nanoxplore/cells_bb.v
usr/share/yosys/nanoxplore/cells_bb_l.v
usr/share/yosys/nanoxplore/cells_bb_m.v
usr/share/yosys/nanoxplore/cells_bb_u.v
usr/share/yosys/nanoxplore/cells_map.v
usr/share/yosys/nanoxplore/cells_sim.v
usr/share/yosys/nanoxplore/cells_sim_l.v
usr/share/yosys/nanoxplore/cells_sim_m.v
usr/share/yosys/nanoxplore/cells_sim_u.v
usr/share/yosys/nanoxplore/cells_wrap.v
usr/share/yosys/nanoxplore/cells_wrap_l.v
usr/share/yosys/nanoxplore/cells_wrap_m.v
usr/share/yosys/nanoxplore/cells_wrap_u.v
usr/share/yosys/nanoxplore/io_map.v
usr/share/yosys/nanoxplore/latches_map.v
usr/share/yosys/nanoxplore/rf_init.vh
usr/share/yosys/nanoxplore/rf_rams_l.txt
usr/share/yosys/nanoxplore/rf_rams_m.txt
usr/share/yosys/nanoxplore/rf_rams_map_l.v
usr/share/yosys/nanoxplore/rf_rams_map_m.v
usr/share/yosys/nanoxplore/rf_rams_map_u.v
usr/share/yosys/nanoxplore/rf_rams_u.txt
usr/share/yosys/nexus
usr/share/yosys/nexus/arith_map.v
usr/share/yosys/nexus/brams.txt
usr/share/yosys/nexus/brams_map.v
usr/share/yosys/nexus/cells_map.v
usr/share/yosys/nexus/cells_sim.v
usr/share/yosys/nexus/cells_xtra.v
usr/share/yosys/nexus/dsp_map.v
usr/share/yosys/nexus/latches_map.v
usr/share/yosys/nexus/lrams.txt
usr/share/yosys/nexus/lrams_map.v
usr/share/yosys/nexus/lutrams.txt
usr/share/yosys/nexus/lutrams_map.v
usr/share/yosys/nexus/parse_init.vh
usr/share/yosys/pmux2mux.v
usr/share/yosys/quicklogic
usr/share/yosys/quicklogic/common
usr/share/yosys/quicklogic/common/cells_sim.v
usr/share/yosys/quicklogic/pp3
usr/share/yosys/quicklogic/pp3/abc9_map.v
usr/share/yosys/quicklogic/pp3/abc9_model.v
usr/share/yosys/quicklogic/pp3/abc9_unmap.v
usr/share/yosys/quicklogic/pp3/cells_map.v
usr/share/yosys/quicklogic/pp3/cells_sim.v
usr/share/yosys/quicklogic/pp3/ffs_map.v
usr/share/yosys/quicklogic/pp3/latches_map.v
usr/share/yosys/quicklogic/pp3/lut_map.v
usr/share/yosys/quicklogic/qlf_k6n10f
usr/share/yosys/quicklogic/qlf_k6n10f/TDP18K_FIFO.v
usr/share/yosys/quicklogic/qlf_k6n10f/arith_map.v
usr/share/yosys/quicklogic/qlf_k6n10f/bram_types_sim.v
usr/share/yosys/quicklogic/qlf_k6n10f/brams_map.v
usr/share/yosys/quicklogic/qlf_k6n10f/brams_sim.v
usr/share/yosys/quicklogic/qlf_k6n10f/cells_sim.v
usr/share/yosys/quicklogic/qlf_k6n10f/dsp_final_map.v
usr/share/yosys/quicklogic/qlf_k6n10f/dsp_map.v
usr/share/yosys/quicklogic/qlf_k6n10f/dsp_sim.v
usr/share/yosys/quicklogic/qlf_k6n10f/ffs_map.v
usr/share/yosys/quicklogic/qlf_k6n10f/libmap_brams.txt
usr/share/yosys/quicklogic/qlf_k6n10f/libmap_brams_map.v
usr/share/yosys/quicklogic/qlf_k6n10f/sram1024x18_mem.v
usr/share/yosys/quicklogic/qlf_k6n10f/ufifo_ctl.v
usr/share/yosys/sf2
usr/share/yosys/sf2/arith_map.v
usr/share/yosys/sf2/cells_map.v
usr/share/yosys/sf2/cells_sim.v
usr/share/yosys/simcells.v
usr/share/yosys/simlib.v
usr/share/yosys/smtio.py
usr/share/yosys/smtmap.v
usr/share/yosys/techmap.v
usr/share/yosys/xilinx
usr/share/yosys/xilinx/abc9_model.v
usr/share/yosys/xilinx/arith_map.v
usr/share/yosys/xilinx/brams_defs.vh
usr/share/yosys/xilinx/brams_xc2v.txt
usr/share/yosys/xilinx/brams_xc2v_map.v
usr/share/yosys/xilinx/brams_xc3sda.txt
usr/share/yosys/xilinx/brams_xc3sda_map.v
usr/share/yosys/xilinx/brams_xc4v.txt
usr/share/yosys/xilinx/brams_xc4v_map.v
usr/share/yosys/xilinx/brams_xc5v_map.v
usr/share/yosys/xilinx/brams_xc6v_map.v
usr/share/yosys/xilinx/brams_xcu_map.v
usr/share/yosys/xilinx/brams_xcv.txt
usr/share/yosys/xilinx/brams_xcv_map.v
usr/share/yosys/xilinx/cells_map.v
usr/share/yosys/xilinx/cells_sim.v
usr/share/yosys/xilinx/cells_xtra.v
usr/share/yosys/xilinx/ff_map.v
usr/share/yosys/xilinx/lut_map.v
usr/share/yosys/xilinx/lutrams_xc5v.txt
usr/share/yosys/xilinx/lutrams_xc5v_map.v
usr/share/yosys/xilinx/lutrams_xcu.txt
usr/share/yosys/xilinx/lutrams_xcv.txt
usr/share/yosys/xilinx/lutrams_xcv_map.v
usr/share/yosys/xilinx/mux_map.v
usr/share/yosys/xilinx/urams.txt
usr/share/yosys/xilinx/urams_map.v
usr/share/yosys/xilinx/xc3s_mult_map.v
usr/share/yosys/xilinx/xc3sda_dsp_map.v
usr/share/yosys/xilinx/xc4v_dsp_map.v
usr/share/yosys/xilinx/xc5v_dsp_map.v
usr/share/yosys/xilinx/xc6s_dsp_map.v
usr/share/yosys/xilinx/xc7_dsp_map.v
usr/share/yosys/xilinx/xcu_dsp_map.v
usr/share/yosys/ywio.py
usr/share/doc/yosys/changelog.Debian.gz

Versions

2 versions in this repository slot, newest first